TC9WMC1FK/FU,TC9WMC2FK/FU

2007-10-19

7

(3.4) Write All (WRAL)

The Write All instruction writes all memory locations with data patterns specified in the

instruction. The data is 16 bits long. After the CS is driven High, a start bit is transferred followed

by the WRAL instruction, any addresses and 16 bits of data. After the least significant bit (D0) of

data is received on the falling edge of SK, a write operation is triggered by the CS being pulled

Low. It is not necessary to set every bit in the memory array to “1” before writing data.

CS

SK

1 2

7 8 9 10

25

1

0

0

DI

DO

Hi-Z

0

3 4 5 6

D0

Hi-Z

Figure 7. Write Timing Diagram (TC9WMC1)

Busy

Ready

Verify

CS

SK

1 2

7 8 9 10

27

1

0

0

DI

DO

Hi-Z

x

3 4 5 6

x xxx

1

D15

D0

Hi-Z

Figure 8. Write Timing Diagram (TC9WMC2)

Busy

Ready

Verify

11 12

x

0