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TC74HCT373AP Datasheet(PDF) 5 Page - Toshiba Semiconductor |
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TC74HCT373AP Datasheet(HTML) 5 Page - Toshiba Semiconductor |
5 / 8 page TC74HCT373AP/AF 2007-10-01 5 AC Characteristics (CL = 50 pF, input: tr = tf = 6 ns) Test Condition Ta = 25°C Ta = −40~85°C Characteristics Symbol CL (pF) VCC (V) Min Typ. Max Min Max Unit Output transition time tTLH tTHL ⎯ 50 4.5 5.5 ⎯ ⎯ 7 6 12 11 ⎯ ⎯ 15 14 ns 50 4.5 5.5 ⎯ ⎯ 19 16 30 27 ⎯ ⎯ 38 34 Propagation delay time (LE-Q) tpLH tpHL ⎯ 150 4.5 5.5 ⎯ ⎯ 24 22 38 34 ⎯ ⎯ 48 43 ns 50 4.5 5.5 ⎯ ⎯ 20 18 30 27 ⎯ ⎯ 38 34 Propagation delay time (D-Q) tpLH tpHL ⎯ 150 4.5 5.5 ⎯ ⎯ 25 22 38 34 ⎯ ⎯ 48 43 ns 50 4.5 5.5 ⎯ ⎯ 19 16 30 27 ⎯ ⎯ 38 34 Output enable time tpZL tpZH RL = 1 kΩ 150 4.5 5.5 ⎯ ⎯ 24 22 38 34 ⎯ ⎯ 48 43 ns Output disable time tpLZ tpHZ RL = 1 kΩ 50 4.5 5.5 ⎯ ⎯ 20 18 30 27 ⎯ ⎯ 38 34 ns Input capacitance CIN ⎯ ⎯ 5 10 ⎯ 10 pF Output capacitance COUT ⎯ ⎯ 10 ⎯ ⎯ ⎯ pF Power dissipation capacitance CPD (Note) ⎯ ⎯ 36 ⎯ ⎯ ⎯ pF Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD・VCC・fIN + ICC/8 (per latch) And the total CPD when n pcs. of flip flop operate can be gained by the following equation: CPD (total) = 19 + 17・n |
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