PCA9543ADRG4 datasheet(11/20 Pages) TI

Part #	PCA9543ADRG4

Description	TWO-CHANNEL I2C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET

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Manufacturer	TI [Texas Instruments]

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Switching Characteristics

Interrupt and Reset Timing Requirements

PCA9543A

TWO-CHANNEL I2C-BUS SWITCH

WITH INTERRUPT LOGIC AND RESET

SCPS169 – SEPTEMBER 2007

over recommended operating free-air temperature range, CL ≤ 100 pF (unless otherwise noted) (see Figure 13)

FROM

TO

PARAMETER

MIN

MAX

UNIT

(INPUT)

(OUTPUT)

RON = 20 Ω, CL = 15 pF

0.3

tpd

(1)

Propagation delay time

SDA or SCL

SDn or SCn

ns

RON = 20 Ω, CL = 50 pF

1

tiv

Interrupt valid time(2)

INTn

INT

4

μs

tir

Interrupt reset delay time(2)

INTn

INT

2

μs

(1)

The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load

capacitance, when driven by an ideal voltage source (zero output impedance).

(2)

Data taken using a 4.7-k

Ω pullup resistor and 100-pF load (see Figure 13)

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 13)

PARAMETER

MIN

MAX

UNIT

tPWRL

Required low-level pulse duration of INTn inputs(1)

1

μs

tPWRH

Required high-level pulse duration of INTn inputs(1)

0.5

μs

tWL

Pulse duration, RESET low

4

ns

trst

(2)

RESET time (SDA clear)

500

ns

tREC

Recovery time from RESET to start

0

ns

(1)

The device has interrupt input rejection circuitry for pulses less than the listed minimum.

(2)

trst is the propagation delay measured from the time the RESET pin is first asserted low to the time the SDA pin is asserted high,

signaling a stop condition. It must be a minimum of tWL.

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