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TC74LCX138FN Datasheet(PDF) 1 Page - Toshiba Semiconductor |
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TC74LCX138FN Datasheet(HTML) 1 Page - Toshiba Semiconductor |
1 / 11 page TC74LCX138F/FN/FT/FK 2007-10-19 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LCX138F,TC74LCX138FN,TC74LCX138FT,TC74LCX138FK Low-Voltage 3-to-8 Line Decoder with 5-V Tolerant Inputs and Outputs The TC74LCX138 is a high-performance CMOS 3-to-8 decoder. Designed for use in 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low-power dissipation. The device is designed for low-voltage (3.3 V) VCC applications, but it could be used to interface to 5-V supply environment for inputs. When the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs ( 0 Y - 7 Y ) will go low. When enable input G1 is held low or either 2A G or 2B G is held high, decoding function is inhibited and all outputs go high. G1, 2A G , and 2B G inputs are provided to ease cascade connection and for use as an address decoder for memory systems. All inputs are equipped with protection circuits against static discharge. Features • Low-voltage operation: VCC = 2.0 to 3.6 V • High-speed operation: tpd = 6.0 ns (max) (VCC = 3.0 to 3.6 V) • Ouput current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V) • Latch-up performance: −500 mA • Available in JEDEC SOP, JEITA SOP, TSSOP and VSSOP (US) • Power-down protection provided on all inputs and outputs • Pin and function compatible with the 74 series (74AC/VHC/HC/F/ALS/LS etc.) 138 type Weight SOP16-P-300-1.27A : 0.18 g (typ.) SOL16-P-150-1.27 : 0.12 g (typ.) TSSOP16-P-0044-0.65A : 0.06 g (typ.) VSSOP16-P-0030-0.50 : 0.02 g (typ.) Note: xxxFN (JEDEC SOP) is not available in Japan. TC74LCX138F TC74LCX138FN TC74LCX138FT TC74LCX138FK |
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