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TC74VHC74F Datasheet(HTML) 4 Page - Toshiba Semiconductor

Part No. TC74VHC74F
Description  Dual D-Type Flip-Flop with Preset and Clear
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Maker  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
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TC74VHC74F Datasheet(HTML) 4 Page - Toshiba Semiconductor

 
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TC74VHC74F/FN/FT/FK
2007-10-01
4
Timing Requirements (input: tr = tf = 3 ns)
Test Condition
Ta =
25°C
Ta =
−40 to
85°C
Characteristics
Symbol
VCC (V)
Limit
Limit
Unit
Minimum pulse width
(CK)
tw (L)
tw (H)
3.3 ± 0.3
5.0 ± 0.5
6.0
5.0
7.0
5.0
ns
Minimum pulse width
( CLR , PR )
tw (L)
3.3 ± 0.3
5.0 ± 0.5
6.0
5.0
7.0
5.0
ns
Minimum set-up time
ts
3.3 ± 0.3
5.0 ± 0.5
6.0
5.0
7.0
5.0
ns
Minimum hold time
th
3.3 ± 0.3
5.0 ± 0.5
0.5
0.5
0.5
0.5
ns
Minimum removal time
( CLR , PR )
trem
3.3 ± 0.3
5.0 ± 0.5
5.0
3.0
5.0
3.0
ns
AC Characteristics (input: tr = tf = 3 ns)
Test Condition
Ta = 25°C
Ta =
−40 to 85°C
Characteristics
Symbol
VCC (V)
CL (pF)
Min
Typ.
Max
Min
Max
Unit
15
6.7
11.9
1.0
14.0
3.3 ± 0.3
50
9.2
15.4
1.0
17.5
15
4.6
7.3
1.0
8.5
Propagation delay
time
(CK-Q,
Q )
tpLH
tpHL
5.0 ± 0.5
50
6.1
9.3
1.0
10.5
ns
15
7.6
12.3
1.0
14.5
3.3 ± 0.3
50
10.1
15.8
1.0
18.0
15
4.8
7.7
1.0
9.0
Propagation delay
time
( CLR , PR -Q, Q)
tpLH
tpHL
5.0 ± 0.5
50
6.3
9.7
1.0
11.0
ns
15
80
125
70
3.3 ± 0.3
50
50
75
45
15
130
170
110
Maximum clock
frequency
fmax
5.0 ± 0.5
50
90
115
75
MHz
Input capacitance
CIN
4
10
10
pF
Power dissipation
capacitance
CPD
(Note)
25
pF
Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD·VCC·fIN + ICC/2 (per F/F)


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