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TC74VHCT574AFT Datasheet(PDF) 5 Page - Toshiba Semiconductor |
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TC74VHCT574AFT Datasheet(HTML) 5 Page - Toshiba Semiconductor |
5 / 9 page TC74VHCT574AF/AFT/AFK 2007-10-01 5 AC Characteristics (input: tr = tf = 3 ns) Test Condition Ta = 25°C Ta = −40 to 85°C Characteristics Symbol VCC (V) CL (pF) Min Typ. Max Min Max Unit 15 ― 4.1 9.4 1.0 10.5 Propagation delay time (CK-Q) tpLH tpHL ― 5.0 ± 0.5 50 ― 5.6 10.4 1.0 11.5 ns 15 ― 6.5 10.2 1.0 11.5 3-state output enable time tpZL tpZH RL = 1 kΩ 5.0 ± 0.5 50 ― 7.3 11.2 1.0 12.5 ns 3-state output disable time tpLZ tpHZ RL = 1 kΩ 5.0 ± 0.5 50 ― 7.0 11.2 1.0 12.0 ns 15 90 140 ― 80 ― Maximum clock frequency fmax ― 5.0 ± 0.5 50 85 130 ― 75 ― MHz Output to output skew tosLH tosHL (Note 1) 5.0 ± 0.5 50 ― ― 1.0 ― 1.0 ns Input capacitance CIN ― ― 4 10 ― 10 pF Output capacitance COUT ― ― 9 ― ― ― pF Power dissipation capacitance CPD (Note 2) ― 25 ― ― ― pF Note 1: Parameter guaranteed by design. tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn| Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC/8 (per F/F) And the total CPD when n pcs. of latch operate can be gained by the following equation: CPD (total) = 14 + 11·n Noise Characteristics (input: tr = tf = 3 ns) Test Condition Ta = 25°C Characteristics Symbol VCC (V) Typ. Max Unit Quiet output maximum dynamic VOL VOLP CL = 50 pF 5.0 1.1 1.5 V Quiet output minimum dynamic VOL VOLV CL = 50 pF 5.0 −1.1 −1.5 V Minimum high level dynamic input voltage VIHD CL = 50 pF 5.0 ― 2.0 V Maximum low level dynamic input voltage VILD CL = 50 pF 5.0 ― 0.8 V |
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