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TC94A04AFDG Datasheet(PDF) 10 Page - Toshiba Semiconductor

Part # TC94A04AFDG
Description  1 chip Audio Digital Processor
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC94A04AFDG Datasheet(HTML) 10 Page - Toshiba Semiconductor

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TC94A04AFG/AFDG
2005-09-28
10
2.1.3 Setting RAM (ACMP mode)
In ACMP mode, the TC94A04AFG/AFDG does not write data directly to coefficient RAM (CRAM) or offset RAM (OFRAM). In this mode, data must be written
to the interface buffer RAM (IFB-RAM). Then, all the data are updated together in a period of 1 fs.
For example, if a signal flow filter is designed as in the following diagram, unless the K1 to K5 data are batch-updated, the circuit may resonate. The same
applies to the K6 to K10 data.
Using ACMP mode can reduce the noise caused by updating coefficients while the TC94A04AFG/AFDG is operating.
IFB-RAM is 32-word memory. Therefore, data can be updated at one time in units of up to 32-words.
The length of the data field is 2 × n bytes, where n <= 32.
In addition, operation at the time of transmitting other commands, before package rewriting of the data by ACMP mode was completed cannot be guaranteed.
Please set up again after initializing by RST terminal or the initialization command.
CS
A11
A10
A13
A12
A15
A14
IFDI
IFCK
A9
A8
C3
C2
C5
C4
C7
C6
C1
C0
A3
A2
A5
A4
A7
A6
A1
A0
D3
D2
D5
D4
D7
D6
D1
D0
D11
D10
D13
D12
D15
D14
D9
D8
D1
D0
Don’t care
Don’t care
Cn: COMMAND
An: ADDRESS
Dn: Data
MCU-I/F
IFB-RAM
CRAM
Write one by one・・・
Update for 1 fs
K6
K1
K2
K3
K4
K5
K7
K8
K9
K10
+
+


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