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74V2G86STR Datasheet(PDF) 1 Page - STMicroelectronics |
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74V2G86STR Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 7 page 1/7 June 2003 s HIGH SPEED: tPD = 4.8ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =1µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH =VNIL = 28% VCC (MIN.) s POWER DOWN PROTECTION ON INPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|= IOL =8mA (MIN) at VCC =4.5V s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V2G86 is an advanced high-speed CMOS DUAL 2-INPUT EXCLUSIVE OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. 74V2G86 DUAL 2-INPUT EXCLUSIVE OR GATE PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE T & R SOT23-8L 74V2G86STR SOT23-8L |
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