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SN74LS2323DR Datasheet(PDF) 5 Page - Texas Instruments |
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SN74LS2323DR Datasheet(HTML) 5 Page - Texas Instruments |
5 / 9 page SN74LS2323 DUAL LINE RECEIVER SDLS965 − OCTOBER 2004 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics, VCC = 5 V ±10%, VREF = 2.5 V, TA = 0°C to 70°C PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT tPLH(L) Propagation delay time, low- to high-level output from LINE CL = 50 pF, RL = 500 Ω, See Figure 1 10 25 35 ns tPHL(L) Propagation delay time, high- to low-level output from LINE CL = 50 pF, RL = 500 Ω, See Figure 1 10 25 35 ns tPLH(S) Propagation delay time, low- to high-level output from COMSTRB CL = 50 pF, RL = 500 Ω, See Figure 1 11 22 ns tPHL(S) Propagation delay time, high- to low-level output from COMSTRB CL = 50 pF, RL = 500 Ω, See Figure 1 8 15 ns † All typical values are at VCC = 5 V, TA = 25°C. PARAMETER MEASUREMENT INFORMATION NOTES: A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, tr and tf ≤ 2 ns, and duty cycle = 50%. B. CL includes probe and jig capacitance. C. All diodes are 1N914 (or equivalent). D. The outputs are measured one at a time, with one input transition per measurement. VOLTAGE WAVEFORMS tPLH(S) tPLH(L) 3 V 2 V 3 V 0 V VOH VOL tPHL(L) OUTPUT D.U.T. TEST CIRCUIT T.P. tPHL(S) COMSTRB LINE 2.5 V 0.8 V 2 V 0.8 V 2 V 1.5 V 1.5 V CL = 50 pF VCC 500 W Figure 1. Load Circuit and Voltage Waveforms |
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