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X84161IG-2.5 Datasheet(PDF) 10 Page - IC MICROSYSTEMS |
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X84161IG-2.5 Datasheet(HTML) 10 Page - IC MICROSYSTEMS |
10 / 18 page X84161/641/129 10 Write Cycle Limits – X84161/641/129 7008 FRM T10 Notes: (5) tNVWC is the time from the falling edge of OE or CE (whichever occurs last) of the second read cycle in the “start nonvolatile write cycle” sequence until the self-timed, internal nonvolatile write cycle is completed. (6) Data is latched into the X84161/641/129 on the rising edge of CE or WE, whichever occurs first. (7) Periodically sampled, but not 100% tested. Symbol Parameter VCC = 5V ±10% VCC = 2.5V – 5.5V VCC = 1.8V – 3.6V Units Min. Max. Min. Max. Min. Max. tNVWC (5) Nonvolatile Write Cycle Time 5 5 5 ms tWC Write Cycle Time 100 200 330 ns tWP WE Pulse Width 25 40 70 ns tWPH WE HIGH Recovery Time 65 150 200 ns tCS Write Setup Time 0 0 0 ns tCH Write Hold Time 0 0 0 ns tCP CE Pulse Width 25 40 70 ns tCPH CE HIGH Recovery Time 65 150 200 ns tOES OE HIGH Setup Time 25 25 50 ns tOEH OE HIGH Hold Time 25 25 50 ns tDS (6) Data Setup Time 12 20 30 ns tDH (6) Data Hold Time 5 5 5 ns tWPSU (7) WP HIGH Setup 100 100 150 ns tWPHD (7) WP HIGH Hold 100 100 150 ns |
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