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TPS2145IPWPRG4 Datasheet(PDF) 6 Page - Texas Instruments |
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TPS2145IPWPRG4 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 34 page TPS2145, TPS2147 TPS2155, TPS2157 SLVS333 − AUGUST 2001 6 www.ti.com electrical characteristics over recommended operating junction-temperature range, 2.9 V ≤ VI(VIN/SWIN1) ≤ 5.5 V, 2.9 V ≤ VI(SWIN2) ≤ 5.5 V, VI(ENx) = 0 V or VI(ENx) = 5 V, VI(LDO_EN) = 5 V, CL(LDO_OUT) = 10 µF, TJ = −40°C to 100°C (unless otherwise noted) (continued) adjustable voltage regulator (Vx = 1 V to 3.3 V) PARAMETER TEST CONDITIONS† MIN TYP MAX UNIT VO Output voltage, dc (see Note 2) VI(VIN/SWIN1) =Vx + 0.6 V to 5.5 V and VI(VIN/SWIN1) > 2.9 V, IO = 0.5 mA to 200 mA 0.97Vx Vx 1.03Vx V Dropout voltage (VIN/SWIN1 to LDO_OUT) VI(VIN/SWIN1) = Vx − 0.1 V, IO = 200 mA 0.5 V Line regulation voltage (see Note 1) VI(VIN/SWIN1) = Vx + 0.6 V to 5.5 V and VI(VIN/SWIN1) > 2.9 V, IO = 5 mA 0.1 %/V Load regulation voltage (see Note 1) VI(VIN/SWIN1) = Vx + 0.6 V to 5.5 V and VI(VIN/SWIN1) > 2.9 V, IO = 5 mA to 200 mA 0.4% 1% IOS Short-circuit current limit VI(VIN/SWIN1) = Vx + 0.6 V to 5.5 V and VI(VIN/SWIN1) > 2.9 V, LDO_OUT connected to GND 0.275 0.33 0.575 A Ilkg(R) Reverse leakage current into LDO_OUT VO(LDO_OUT) = Vx, VI(VIN/SWIN1) = 0 V, VI(LDO_EN) = 0 V 10 µA Ilkg(R) Reverse leakage current into LDO_OUT VO(LDO_OUT) = 5.5 V, VI(VIN/SWIN1) = 2.8 V, VI(LDO_EN) = 0 V 10 µA ton Turnoff time, LDO_EN transitioning low (see Note 1) From 50% LDO_EN to 10% LDO_OUT, RL = Vx/0.2 Ω, CL(LDO_OUT) = 10 µF 0.1 1 ms toff Turnon time, LDO_EN transitioning high (see Note 1) From 50% LDO_EN to 90% LDO_OUT, RL = Vx/0.2 Ω, CL(LDO_OUT) = 10 µF 0.1 1 ms Ramp-up time, LDO_OUT (0% to 90%) VI(LDO_EN) = 5 V, VIN/SWIN1 ramping up from 10% to 90% in 0.1 ms, RL = Vx/0.2 Ω, CL(LDO_OUT) = 10 µF 0.1 1 ms Output tracking OUT1 lag time from LDO_OUT given LDO_EN and EN1 have been asserted si- multaneously to turnon their respective out- puts. Measured at 1 V. (see Note 1) LDO load RL = Vx/0.2 Ω, CL(LDO_OUT) = 10 µF, OUT1 RL = 33 Ω, 10 µF, VI(VIN/SWIN1) = 3.3 V 0 1 ms Power supply rejection f = 1 kHz, CL(LDO_OUT) = 4.7 µF, ESR = 0.25 Ω, IO = 5 mA, VI(VIN/SWIN1)p−p = 100 mV 50 dB † Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately. NOTES: 1. Specified by design, not tested in production. 2. Does not include error introduced by external resistive divider R1, R2 tolerance. |
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Similar Description - TPS2145IPWPRG4 |
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