FAN50FC3MPX datasheet(7/21 Pages) FAIRCHILD

Part #	FAN50FC3MPX

Description	8-Bit Programmable, 2- to 3-Phase FastvCore??Buck Controller

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Manufacturer	FAIRCHILD [Fairchild Semiconductor]

Direct Link	http://www.fairchildsemi.com

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FAN50FC3 Rev. 1.0.0

7 of 21

Electrical Characteristics (Continued)

VCC = 12V, FBRTN = GND, and TA = +25°C. The • denotes specifications which apply over the full operating

temperature range.

Symbol

Parameter

Conditions

Min. Typ. Max. Unit

Current-Sense Amplifier (Continued)

Output Voltage Range

• 0.05

3.20

V

ICSCOMP

Output Current

1

mA

Current Balance Circuit

VSW(x)CM

Common Mode Range

(3)

• -600

+200

mV

RSW(x)

Input Resistance

SW(x) = 0V

• 35

50

65

k

Ω

ISW(x)

Input Current

SW(x) = 0V

• 1.6

3.3

5.0

µA

ΔISW(x)

Input Current Matching

SW(x) = 0V

•

-5

+5

%

Current Limit Comparator

VILIMIT

Output Voltage

RILIMT = 143kΩ

• 1.6

1.7

1.8

V

IILIMIT

Output Current

RILIMT = 143kΩ

12

µA

Maximum Output Current

• 60

µA

VCL

Current Limit Threshold Voltage

VCSREF − VCSCOMP, RILIMT = 143kΩ

• 100 120 140

mV

Current Limit Setting Ratio

VCL / IILIMT

10

mV/µA

Delay Timer

IDELAY

Normal Mode Output Current

• 12

15

18

µA

IDELAY(CL)

Output Current in Current Limit

• 3.00 3.75 4.50

µA

VDELAY(TH)

Threshold Voltage

• 1.6

1.7

1.8

V

Soft-Start

I(SS)

Output Current

During Start-up

• 12

15

18

µA

Enable Input

VTH(EN)

Threshold Voltage

• 800 850 900

mV

VHYS(EN)

Threshold Hysteresis

• 80

100

130

mV

IIN(EN)

Enable Input Current

1

µA

tDELAY(EN)

Turn-On Delay

Start-up sequence, EN>950mV,

CDELAY = 10nF

2

ms

#OD Output

VOL(ODB)

Output Voltage LOW

IPWM(SINK) = 400μA

•

160

400

mV

VOH(ODB)

Output Voltage HIGH

IPWM(SOURCE) = 400μA

•

4

5

V

Power-Good Comparator

VPWRGD(UV)

Under-Voltage Threshold

Relative to Nominal DAC Output

• -300 -250 -200

mV

VPWRGD(OV)

Over-Voltage Threshold

Relative to Nominal DAC Output

• 100 150 200

mV

VOL(PWRGD)

Output Low Voltage

IPWRGD(SINK) = -4mA

•

200

300

mV

t1PG(DLY)

Power Good Delay Time 1

Start-up Sequence; CDELAY = 10nF;

Power Good Blanking Time

•

2

ms

t2PG(DLY)

Power Good Delay Time 2

VID Code Changing; CDELAY = 10nF;

Power Good Blanking Time

• 100 250

µs

t3PG(DLY)

Power Good Delay Time 3

(3)

VID Code Static; CDELAY = 10nF;

Power Good Blanking Time

• 100 200

ns

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