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STMPE1601TBR Datasheet(PDF) 23 Page - STMicroelectronics |
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STMPE1601TBR Datasheet(HTML) 23 Page - STMicroelectronics |
23 / 58 page STMPE1601 Interrupt system 23/58 9 Interrupt system The STMPE1601 uses a highly flexible interrupt system. It allows the host system to configure the type of system events that should result in an interrupt, and pinpoints the source of interrupt by status register. The INT pin can be configured as ACTIVE HIGH, or ACTIVE LOW. Once asserted, the INT pin would de-assert only if the corresponding bit in the interrupt status register is cleared. Figure 6. Interrupt system 9.1 Interrupt system register map Keypad controller PWM controller GPIO controller Interrupt status register Interrupt enable register Interrupt generation Interrupt polarity control (System control register) Table 16. Register map Address Register name Description Auto-increment (during sequential R/W) 0x10 INT_CTRL_MSB Interrupt control register Yes 0x11 INT__CTRL_LSB Yes 0x12 INT_EN_MASK_MSB Interrupt enable mask register Yes 0x13 INT_EN_MASK_LSB Yes 0x14 INT_STA_MSB Interrupt status register Yes 0x15 INT_STA_LSB Yes 0x16 INT_EN_GPIO_MASK _MSB Interrupt enable GPIO mask register Yes 0x17 INT_EN_GPIO_MASK _LSB Yes 0x18 INT_STA_GPIO_MSB Interrupt status GPIO register Yes 0x19 INT_STA_GPIO_LSB Yes |
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