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TPS79318DBVRQ1 Datasheet(PDF) 11 Page - Texas Instruments |
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TPS79318DBVRQ1 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 16 page TPS79301Q1,'79318Q1, '79325Q1 '79328Q1,'793285Q1,'79330Q1 TPS79333Q1,'793475Q1 SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007 www.ti.com 11 APPLICATION INFORMATION POWER DISSIPATION AND JUNCTION TEMPERATURE Specified regulator operation is assured to a junction temperature of 125 °C; the maximum junction temperature should be restricted to 125 °C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum power dissipation limit is determined using the following equation: P D(max) + T J max * T A RθJA Where: TJmax = Maximum allowable junction temperature RθJA = Thermal resistance, junction-to-ambient, for the package (see the dissipation rating table) TA = Ambient temperature. (1) The regulator dissipation is calculated using: P D + V I * V O I O (2) Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal protection circuit. PROGRAMMING THE TPS79301 ADJUSTABLE LDO REGULATOR The output voltage of the TPS79301 adjustable regulator is programmed using an external resistor divider as shown in Figure 23. The output voltage is calculated using: V O + V ref 1 ) R1 R2 (3) Where: Vref = 1.2246 V typ (internal reference voltage) Resistors R1 and R2 should be chosen for approximately 50- µA divider current. Lower-value resistors can be used for improved noise performance, but the solution consumes more power. Higher resistor values should be avoided, as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and, thus, erroneously decreases/increases VO. The recommended design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA, C1 = 15 pF for stability, and then calculate R1 using: R1 + V O V ref * 1 R2 (4) In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be placed between OUT and FB. For voltages <1.8 V, the value of this capacitor should be 100 pF. For voltages >1.8 V, the approximate value of this capacitor can be calculated as: C1 + (3 x 10*7) (R1 ) R2) (R1 R2) (5) The suggested value of this capacitor for several resistor ratios is shown in Figure 23. If this capacitor is not used (such as in a unity-gain configuration) or if an output voltage <1.8 V is chosen, the minimum recommended output capacitor is 4.7 µF instead of 2.2 µF. |
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