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TPS793475DBVRQ1 Datasheet(PDF) 10 Page - Texas Instruments |
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TPS793475DBVRQ1 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 16 page TPS79301Q1,'79318Q1, '79325Q1 '79328Q1,'793285Q1,'79330Q1 TPS79333Q1,'793475Q1 SGLS162D − APRIL 2003 − REVISED SEPTEMBER 2007 www.ti.com 10 APPLICATION INFORMATION The TPS793xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive battery-operated equipment. The device features low dropout voltages, high PSRR, ultralow output noise, low quiescent current (170 µA typical), and enable input to reduce supply currents to less than 1 µA when the regulator is turned off. A typical application circuit is shown in Figure 22. 0.1 µF BYPASS OUT 1 3 IN EN GND 2 4 5 VI VO 2.2 µF + TPS793xx 0.01 µF Figure 22. Typical Application Circuit EXTERNAL CAPACITOR REQUIREMENTS A 0.1- µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS793xx, is required for stability and improves transient response, noise rejection, and ripple rejection. A higher-value electrolytic input capacitor may be necessary if large, fast rise time, load transients are anticipated and the device is located several inches from the power source. Like all low dropout regulators, the TPS793xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 2.2 µF. Any 2.2-µF or larger ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. The internal voltage reference is a key source of noise in an LDO regulator. The TPS793xx has a BYPASS pin that is connected to the voltage reference through a 250-k Ω internal resistor. The 250-kΩ internal resistor, in conjunction with an external bypass capacitor connected to the BYPASS pin, creates a low-pass filter to reduce the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the BYPASS pin must be at a minimum, because any leakage current creates an IR drop across the internal resistor, thus creating an output error. Therefore, the bypass capacitor must have minimal leakage current. For example, the TPS79328 exhibits only 32 µVRMS of output voltage noise using a 0.1-µF ceramic bypass capacitor and a 2.2- µF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance increases due to the RC time constant at BYPASS that is created by the internal 250-k Ω resistor and external capacitor. BOARD LAYOUT RECOMMENDATION TO IMPROVE PSRR AND NOISE PERFORMANCE To improve ac measurements such as PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device. |
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