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74AHC02PW Datasheet(PDF) 11 Page - NXP Semiconductors |
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74AHC02PW Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 13 page 74AHC_AHCT02_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 7 January 2008 11 of 13 NXP Semiconductors 74AHC02; 74AHCT02 Quad 2-input NOR gate 13. Abbreviations 14. Revision history Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor LSTTL Low-power Schottky Transistor-Transistor Logic ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model CDM Charge Device Model TTL Transistor-Transistor Logic Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT02_3 20080107 Product data sheet - 74AHC_AHCT02_2 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section 3: DHVQFN14 package added. • Section 8: derating values added for DHVQFN14 package. • Section 12: outline drawing added for DHVQFN14 package. 74AHC_AHCT02_2 19990923 Product specification - 74AHC_AHCT02_1 74AHC_AHCT02_1 19981218 Product specification - - |
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