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74LVC1G99DP Datasheet(PDF) 3 Page - NXP Semiconductors |
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74LVC1G99DP Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 26 page 74LVC1G99_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 3 January 2008 3 of 26 NXP Semiconductors 74LVC1G99 Ultra-configurable multiple function gate; 3-state 6. Pinning information 6.1 Pinning 6.2 Pin description Fig 2. Pin configuration SOT505-2 (TSSOP8) 74LVC1G99 OE VCC AY BD GND C 001aah323 1 2 3 4 6 5 8 7 Fig 3. Pin configuration SOT833-1 (XSON8) Fig 4. Pin configuration SOT902-1 (XQFN8U) 74LVC1G99 D Y VCC C B A OE GND 001aah324 36 27 18 45 Transparent top view 001aah325 A D OE B Y C Transparent top view 3 6 1 5 7 2 terminal 1 index area 74LVC1G99 Table 3. Pin description Symbol Pin Description SOT505-2 and SOT833-1 SOT902-1 OE 1 7 output enable input OE (active LOW) A 2 6 data input B 3 5 data input GND 4 4 ground (0 V) C 5 3 data input D 6 2 data input Y 7 1 data output VCC 8 8 supply voltage |
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