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74LVC4245APW Datasheet(PDF) 1 Page - NXP Semiconductors |
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74LVC4245APW Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 17 page 1. General description The 74LVC4245A is an octal dual supply translating transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply environment. The device features an output enable input (pin OE) for easy cascading and a send/receive input (pin DIR) for direction control. Pin OE controls the outputs so that the buses are effectively isolated. In suspend mode, when VCCA is zero, there will be no current flow from one supply to the other supply. The A-outputs must be set 3-state and the voltage on the A-bus must be smaller than Vdiode (typical 0.7 V). VCCA ≥ VCCB, except in suspend mode. 2. Features I 5 V tolerant inputs/outputs, for interfacing with 5 V logic I Wide supply voltage range: N 3 V port (VCCB): 1.5 V to 3.6 V N 5 V port (VCCA): 1.5 V to 5.5 V I CMOS low-power consumption I Direct interface with TTL levels I Inputs accept voltages up to 5.5 V I High-impedance when VCC = 0 V I Complies with JEDEC standard no. JESD8B/JESD36 I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V I Multiple package options I Specified from −40 °C to +85 °C and −40 °C to +125 °C 74LVC4245A Octal dual supply translating transceiver; 3-state Rev. 06 — 18 January 2008 Product data sheet |
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