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EMIF09-02726SX Datasheet(PDF) 6 Page - STMicroelectronics |
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EMIF09-02726SX Datasheet(HTML) 6 Page - STMicroelectronics |
6 / 12 page It should be noted that the EMIF09-02726Sxis not only active for positive ESD surges but also for negative ones. For this kind of disturbance,it clamps close to ground voltage as shown in Fig. A3b. NOTE: DYNAMIC RESISTANCE MEASUREMENT Generally the PCB designers need to calculate easily the clamping voltage VCL. This is why we give the dynamic resistance in addition to the classical parameters. Figure A4 illustrates the current waveform used to measure the Rd. As the value of the dynamic resistance remains stable for a surge duration lower than 20 µs, the 2.5 µs rectangular surge is well adapted. In additionboth rise and fall times are optimized to avoid any parasitic phenomenon during the measurement of Rd. Fig. A2: Measurement conditions Vin Vout ESD SURGE GND GND EMIF09-02726Sx R Fig. A3: Remaining voltage at both stages S1 (Vin) and S2 (Vout) during ESD surge a) Positive surge b) Negative surge Fig. A4: Rd measurement current wave 2.5 µs 2 µs tt I IPP 2.5 µs durationmeasurement wave LATCH-UP PHENOMENA The early aging and destruction of IC’s is often due to latch-up phenome na which is principally induced by dV/dt. Thanks to its RC structure, the EMIF09-0272 6Sx provides a high immunity to latch-up by integration of fast edges. (See the response of EMIF09-02726Sx to a 1ns edge on Fig. A3) The measurements performed as described below show very clearly the high efficiency of the ESD protection: - no influence of the parasitic inductances on Vout stage - Vout clamping voltage very close to Vbr EMIF09-02726Sx 6/12 |
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