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K24C040-WIRG-S Datasheet(PDF) 11 Page - Estek Electronics Co. Ltd |
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K24C040-WIRG-S Datasheet(HTML) 11 Page - Estek Electronics Co. Ltd |
11 / 13 page R O M Bus Timing ¡Figure 10: SCL: Serial Clock, SDA: Serial Data I/O Write Cycle Timing ¡Figure 11: SCL: Serial Clock, SDA: Serial Data I/O Note 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. SCL SDA_IN SDA_OUT tF tLOW tSU.STA tHD.STA tAA tDH tBUF tSU.STO tR tHD.DAT tSU.DAT tHIGH tLOW 8th BIT SCL SDA ACK STOP CONDITION START CONDITION tWR(1) 11 BEIJING ESTEK ELECTRONICS CO.,LTD 24C02 / 24C04 / 24C08 / 24C16 |
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