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TH8056KDCA8 Datasheet(PDF) 8 Page - Melexis Microelectronic Systems

Part # TH8056KDCA8
Description  Enhanced Single Wire CAN Transceiver
Download  26 Pages
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Manufacturer  MELEXIS [Melexis Microelectronic Systems]
Direct Link  http://www.melexis.com
Logo MELEXIS - Melexis Microelectronic Systems

TH8056KDCA8 Datasheet(HTML) 8 Page - Melexis Microelectronic Systems

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TH8056
Enhanced Single Wire CAN Transceiver
TH8056 – Datasheet
Page 8 of 26
3901008056
March 2007
Rev 012
[1]
The maximum signal delay time for a bus rising edge is measured from Vcmos il on the TxD input pin to the VihMax + V g off max
level on CANH at maximum network time constant , minimum signal delay time for a bus rising edge is measured from Vcmos ih
on the TxD input pin to 1V on CANH at minimum network time constant .These definitions are valid in both normal and HVWU
mode
[2]
The maximum signal delay time for a bus rising edge in HVWU mode is measured from Vcmos il on the TxD input pin to the
VihWUMax + V g off max level on CANH at maximum network time constant, minimum signal delay time for a bus rising edge is
measured from Vcmos ih on the TxD input pin to 1V on CANH at minimum network time constant
[3]
Maximum signal delay time for a bus falling edge is measured from V cmos ih on the TxD input pin to 1V on CANH at maximum
network time constant, minimum signal delay time for a bus falling edge is measured from V cmos ih on the TxD input pin to the
VihMax + V g off max level on CANH. These definitions are valid in both normal and HVWU mode.
[4]
The signal delay time in high-speed mode for a bus rising edge is measured from Vcmos il on the TxD input pin to the VihMax + V g
off max level on CANH at maximum high-speed network time constant.
[5]
The signal delay time in high-speed mode for a bus falling edge is measured from Vcmos ih on the TxD input pin to 1V on CANH
at maximum high-speed network time constant
[6]
Receive delay time is measured from the rising / falling edge crossing of the nominal Vih value on CANH to the falling
(Vcmos_il_max) / rising (Vcmos_ih_min) edge of RxD. This parameter is tested by applying a square wave signal to CANH.
The minimum slew rate for the bus rising and falling edges is 50V/us. The low level on bus is always 0V. For normal mode
and high-speed mode testing the high level on bus is 4V. For HVWU mode testing the high level on bus is Vbat – 2V.
2.5
Bus loading requirements
Parameter
Symbol
Min
Typ
Max
Unit
Number of system nodes
2
32
Network distance between any two ECU nodes
Bus length
60
M
Node Series Inductor Resistance (if required)
Rind
3.5
Ohm
Ground Offset Voltage
Vgoff
1.3
V
Ground Offset Voltage, low battery
Vgofflb
0.1 VBAT
0.6
V
Device Capacitance (unit load)
Cul
135
150
300
pF
Network Total Capacitance
Ctl
396
19000
pF
Device Resistance (unit load)
Rul
6435
6490
6665
Ohm
Device Resistance (min load)
Rmin
2000
Ohm
Network Total Resistance
Rtl
200
3332
Ohm
High-Speed Mode Network Resistance to GND
Rload
75
135
Ohm
Network Time Constant [1]
τ
1
4
µs
Network Time Constant, high-speed mode [1]
τ
1.5
µs
[1] The network time constant incorporates the bus wiring capacitance. The minimum value is selected to limit radiated emissions. The
maximum value is selected to ensure proper communication under all communication modes. Not all combinations of R and C are
possible. The following load conditions are used for the measurement of the dynamic characteristics:
Normal and high volt. Wake-up mode
High-speed mode
min.load/min tau
3.3KΩ/ 540pF
min.load/max tau
3.3KΩ/ 1.2nF
Additional 140Ω tool resistance to
ground in parallel
max.load/min tau
200Ω/ 5nF
max.load/max tau 200Ω/ 20nF
Additional 120Ω tool resistance to
ground in parallel


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