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AD8010AR-16-REEL Datasheet(PDF) 8 Page - Analog Devices |
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AD8010AR-16-REEL Datasheet(HTML) 8 Page - Analog Devices |
8 / 12 page AD8010 –8– REV. B 0 INPUT (500mV/DIV) OUTPUT (1V/DIV) G = +6 RF = 604 RL = 18.75 INPUT OUTPUT 100ns Figure 27. Overdrive Recovery; G = +6 OVERDRIVE RECOVERY Overdrive of an amplifier occurs when the output and/or input range are exceeded. The amplifier must recover from this over- drive condition. As shown in Figure 27, the AD8010 recovers within 35 ns from negative overdrive and within 75 ns from positive overdrive. THEORY OF OPERATION The AD8010 is a current feedback amplifier optimized for high current output while maintaining excellent performance with respect to flatness, distortion and differential gain/phase. As a video distribution amplifier, the AD8010 will drive up to 12 parallel video loads (12.5 Ω) from a single output with 0.04% differential gain and 0.04 ° differential phase errors. This means that, unlike designs with one driver per output, any output is a true reflection of the signal on all other outputs. The high output current capability of the AD8010 also make it useful in xDSL applications. The AD8010 can drive a 12.5 Ω single-ended or 25 Ω differential load with low harmonic dis- tortion. This makes it useful in designs that utilize a step-up transformer to drive a twisted-pair transmission line. To achieve these levels of performance special precautions with respect to supply bypassing are recommended (Figure 29). This configuration minimizes the contribution from high frequency supply rejection to differential gain and phase errors as well as reducing distortion due to harmonic energy in the power supplies. RS – 200 100 1 020 5 10 10 15 G = +2 G = +5 G = +1 GAIN AS SHOWN VO = 0.2V p-p w/ 30% OVERSHOOT VOUT VIN RF RG 150 50 RS CL Figure 28. Capacitive Load Drive vs. Series Resistor for Various Gains Driving Capacitance Loads The AD8010 was designed primarily to drive nonreactive loads. If driving loads with a capacitive component is desired, best frequency response is obtained by the addition of a small series resistance as shown in Figure 28. The inset figure shows the optimum value for RSERIES vs. capacitive load. It is worth noting that the frequency response of the circuit when driving large capacitive loads will be dominated by the passive roll-off of RSERIES and CL. LAYOUT CONSIDERATIONS The specified high speed performance of the AD8010 requires careful attention to board layout and component selection. Proper RF design techniques and low-pass parasitic component selection are necessary. The PCB should have a ground plane covering all unused portions of the component side of the board to provide low impedance path. The ground plane should be removed from the area near the input pins to reduce the parasitic capacitance. AD8010 VIN 150 RF RG RT +VS –VS FB C1 + RBT ZO RL C2 + Figure 29. Standard Noninverting Closed-Loop Configura- tion with Recommended Bypassing Technique The standard noninverting closed-loop configuration with the recommended power supply bypassing technique is shown in Figure 29. Ferrite beads (Amidon Associates, Torrance CA, Part Number 43101) are used to suppress high frequency power supply energy on the DUT supply lines at the DUT. C1 and C2 each represent the parallel combination of a 47 µF (16 V) tanta- lum electrolytic capacitor, a 10 µF (10 V) tantalum electrolytic capacitor and a 0.1 µF ceramic chip capacitor. Connect C1 from the +VS pin to the –VS pin. Connect C2 from the –VS pin to signal ground. The feedback resistor should be located close to the inverting input pin in order to keep the parasitic capacitance at this node to a minimum. Parasitic capacitances of less than 1 pF at the inverting input can significantly affect high speed performance. Stripline design techniques should be used for long traces (greater than about 3 cm). These should be designed with a characteristic impedance (ZO) of 50 Ω or 75 Ω and be properly terminated at each end. |
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