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LM3200 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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LM3200 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
4 / 15 page Electrical Characteristics (Notes 2, 7) Limits in standard typeface are for T A =TJ = 25˚C. Limits in boldface type apply over the full operating ambient temperature range (−25˚C ≤ T A =TJ ≤ +85˚C). Unless otherwise noted, specifications apply to the LM3200 with: PV IN =VDD = EN = 3.6V, BYP = 0V. (Continued) Symbol Parameter Conditions Min Typ Max Units V IL Logic Low Input Threshold for EN, BYP 0.4 V I PIN Pin Pull Down Current for EN, BYP EN, BYP = 3.6V 5 10 µA Gain V CON to VOUT Gain 3 V/V I CON V CON Input Leakage Current V CON = 1.2V 10 nA System Characteristics The following spec table entries are guaranteed by design if the component values in the typical application circuit are used. These parameters are not guaranteed by production testing. Symbol Parameter Conditions Min Typ Max Units T RESPONSE Time for VOUT to Rise from 0.8V to 3.4V in PWM Mode V IN = 4.2V, COUT = 4.7 µF, R LOAD =15 Ω L = 2.2 uH 25 µs C CON V CON Input Capacitance V CON = 1V, Test frequency = 100 kHz 15 pF T ON_BYP Bypass FET Turn On Time In Bypass Mode V IN = 3.6V, VCON = 0.267V, C OUT = 4.7 µF, RLOAD =15 Ω BYP = Low to High 30 µs T BYP Auto Bypass Detect Delay Time (Note 10) 10 15 20 µs Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pins. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150˚C (typ.) and disengages at TJ = 130˚C (typ.). Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 k Ω resistor into each pin. (MIL-STD-883 3015.7) The machine model is a 200 pF capacitor discharged directly into each pin. National Semiconductor recommends that all integrated circuits be handled with Appropriate precautions. Failure to observe proper ESD handling techniques can result in damage. Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be de-rated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX =TJ-MAX-OP –(θJA xPD-MAX). Note 6: Junction-to-ambient thermal resistance ( θJA) is taken from thermal measurements, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. A 1" x 1", 4 layer, 1.5 oz. Cu board was used for the measurements. Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Note 8: The LM3200 is designed for mobile phone applications where turn-on after power-up is controlled by the system controller and where requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.7V. Note 9: Over-Voltage protection (OVP) threshold is the voltage above the nominal VOUT where the OVP comparator turns off the PFET switch while in PWM mode. Note 10: VIN is compared to the programmed output voltage (VOUT). When VIN–VOUT falls below VBYPASS− for longer than TBYP the Bypass FET turns on and the switching FETs turn off. This is called the Bypass mode. Bypass mode is exited when VIN–VOUT exceeds VBYPASS + for longer than T BYP, and PWM mode returns. The hysterisis for the bypass detection threshold VBYPASS + –V BYPASS− will always be positive and will be approximately 200 mV(typ.). Note 11: Shutdown current includes leakage current of PFET and Bypass FET. Note 12: Electrical Characteristic table reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%. Note 13: Bypass FET current limit is defined as the load current at which the FB voltage is 1V lower than VIN. www.national.com 4 |
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