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LMH0202_0606 Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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LMH0202_0606 Datasheet(HTML) 5 Page - National Semiconductor (TI) |
5 / 6 page Device Operation (Continued) DVB-ASI APPLICATIONS The dual differential inputs of the LMH0202 may be exter- nally routed to a single differential input as shown in Figure 2. This provides a solution for DVB-ASI applications where two non-inverted outputs are needed. OUTPUT INTERFACING The LMH0202 uses current mode outputs. Single-ended output levels are 800 mV P-P into 75 Ω AC-coupled coaxial cable (with R REF = 750 Ω). Output level is controlled by the value of the resistor connected between the R REF pin and V CC. The R REF resistor should be placed as close as possible to the R REF pin. In addition, the copper in the plane layers below the R REF network should be removed to minimize parasitic capacitance. OUTPUT SLEW RATE CONTROL The LMH0202 output rise and fall times are selectable for either SMPTE 259M or SMPTE 292M compliance via the SD/HD pin. For slower rise and fall times, or SMPTE 259M compliance, SD/HD is set high. For faster rise and fall times, or SMPTE 292M compliance, SD/HD is set low. 20173103 FIGURE 2. Single Differential Input for DVB-ASI www.national.com 5 |
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