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DS1672-33 Datasheet(PDF) 9 Page - Maxim Integrated Products |
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DS1672-33 Datasheet(HTML) 9 Page - Maxim Integrated Products |
9 / 15 page DS1672 9 of 15 Clock Accuracy The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was trimmed. Additional error will be added by crystal frequency drift caused by temperature shifts. External circuit noise coupled into the oscillator circuit may result in the clock running fast. Refer to Application Note 58: “Crystal Considerations with Dallas Real-Time Clocks” for detailed information. Address Map The counter is accessed by reading or writing the first 4 bytes of the DS1672 (00h–03h). The control register and trickle charger are accessed by reading or writing the appropriate register bytes as illustrated in Table 2. If the master continues to send or request more data after the address pointer has reached 05h, the address pointer will wrap around to location 00h. Table 2. Registers ADDRESS B7 B6 B5 B4 B3 B2 B1 B0 FUNCTION 00h LSB Counter Byte 1 01h Counter Byte 2 02h Counter Byte 3 03h MSB Counter Byte 4 04h EOSC Control 05h TCS TCS TCS TCS DS DS RS RS Trickle Charger Power Control The device is fully accessible and data can be written and ready only when VCC is greater than VPF. However, when VCC falls below V PF, (point at which write protection occurs) the internal clock registers are blocked from any access. If VPF is less than VBACKUP, the device power is switched from VCC to VBACKUP when VCC drops below VPF. If VPF is greater than VBACKUP, the device power is switched from VCC to VBACKUP when VCC drops below VBACKUP. Oscillator and counter operation are maintained from the VBACKUP source until VCC is returned to nominal levels (see Table 3). Table 3. Power Control SUPPLY CONDITION READ/WRITE ACCESS RST POWERED BY VCC < VPF, VCC < VBACKUP No Active VBACKUP VCC < VPF, VCC > VBACKUP No Active VCC VCC > VPF, VCC < VBACKUP Yes Inactive VCC VCC > VPF, VCC > VBACKUP Yes Inactive VCC Oscillator Control The EOSC bit (bit 7 of the control register) controls the oscillator when in back-up mode. This bit when set to logic 0 will start the oscillator. When this bit is set to a logic 1, the oscillator is stopped and the DS1672 is placed into a low-power standby mode (IBACKUP) when in backup mode. When the DS1672 is powered by VCC, the oscillator is always on regardless of the status of the EOSC bit; however, the counter is incremented only when EOSC is a logic 0. |
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