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SN65LBC184DR Datasheet(PDF) 6 Page - Texas Instruments |
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SN65LBC184DR Datasheet(HTML) 6 Page - Texas Instruments |
6 / 21 page SN65LBC184, SN75LBC184 DIFFERENTIAL TRANSCEIVER WITH TRANSIENT VOLTAGE SUPPRESSION SLLS236G − OCTOBER 1996 − REVISED MARCH 2007 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 RECEIVER SECTION electrical characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT DE = RE = 0 V, No Load 3.9 mA ICC Supply current (total package) RE = 5 V, No Load DE = 0 V, 300 µA VI = 12 V 250 II Input current Other input = 0 V VI = 12 V, VCC = 0 250 A II Input current Other input = 0 V VI = − 7 V − 200 µA VI = − 7 V, VCC = 0 − 200 IOZ High-impedance-state output current VO = 0.4 V to 2.4 V ±100 µA Vhys Input hysteresis voltage 70 mV VIT + Positive-going input threshold voltage 200 mV VIT− Negative-going input threshold voltage − 200 mV VOH High-level output voltage IOH = − 8 mA Figure 7 2.8 V VOL Low-level output voltage IOL = 4 mA Figure 7 0.4 V † All typical values are at VCC = 5 V, TA = 25°C. switching characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low-to-high-level output CL = 50 pF, See Figure 7 150 ns tPHL Propagation delay time, high-to-low-level output CL = 50 pF, See Figure 7 150 ns tsk(p) Pulse skew (| tpHL − tpLH |) 50 ns tr Rise time, single ended See Figure 7 20 ns tf Fall time, single ended See Figure 7 20 ns tPZH Output enable time to high level 100 ns tPZL Output enable time to low level See Figure 8 100 ns tPHZ Output disable time from high level See Figure 8 100 ns tPLZ Output disable time from low level 100 ns |
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