M25PE16-VMP6TG datasheet(5/58 Pages) NUMONYX

Part #	M25PE16-VMP6TG

Description	16-Mbit, page-erasable serial flash memory with byte-alterability, 75 MHz SPI bus, standard pinout

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Manufacturer	NUMONYX [Numonyx B.V]

Direct Link	http://www.numonyx.com

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5 / 58 page

M25PE16

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Figure 1.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 2.

VFQFPN and SO connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 3.

Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 4.

SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 5.

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 6.

Write enable (WREN) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 7.

Write disable (WRDI) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 8.

Read identification (RDID) instruction sequence and data-out sequence . . . . . . . . . . . . . 24

Figure 9.

Read status register (RDSR) instruction sequence and data-out sequence . . . . . . . . . . . 26

Figure 10.

Write status register (WRSR) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 11.

Read data bytes (READ) instruction sequence and data-out sequence . . . . . . . . . . . . . . 29

Figure 12.

Read data bytes at higher speed (FAST_READ) instruction sequence

and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 13.

Read lock register (RDLR) instruction sequence

and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 14.

Page write (PW) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 15.

Page program (PP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 16.

Write to lock register (WRLR) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 17.

Page erase (PE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 18.

Sector erase (SE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Figure 19.

Subsector erase (SSE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 20.

Bulk erase (BE) instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 21.

Deep power-down (DP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 22.

Release from deep power-down (RDP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . 42

Figure 23.

Power-up timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 24.

AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Figure 25.

Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Figure 26.

Write protect setup and hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Figure 27.

Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Figure 28.

Reset AC waveforms while a program or erase cycle is in progress . . . . . . . . . . . . . . . . . 52

Figure 29.

VFQFPN8 (MLP8) 8-lead very thin dual flat package no lead, 6 × 5 mm,

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Figure 30.

SO8 wide – 8 lead plastic small outline, 208 mils body width, package outline . . . . . . . . . 55

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M25PE16-VMP6TG Datasheet(PDF) 5 Page - Numonyx B.V

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