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UPD753106 Datasheet(PDF) 6 Page - NEC |
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UPD753106 Datasheet(HTML) 6 Page - NEC |
6 / 459 page 6 Major Revisions in this Edition Page Description Throughout Data bus pins (D0 to D7) are added. p. 41 Table 2-3 List of Recommended Connections for Unused Pins is changed. p. 71 Caution in Table 4-1 Differences between Mk I Mode and Mk II Mode is changed. p. 122 Description on feedback resistor mask option in 5.2.2 (6) Subsystem clock oscillator control register (SOS) is deleted. p. 124 Table 5-5 Maximum Time Required to Switch System to/from CPU Clocks is changed. p. 125 Figure 5-19 Switching between System Clock and CPU Clock is changed. p. 238 Cautions are added to 5.6.7 (a) Bus release signal (REL) and 5.6.7 (b) Command signal (CMD). p. 340 7.4 Mask Option Selection is added. p. 353 9.2 Writing Program Memory is changed. p. 354 9.3 Reading Program Memory is changed. p. 358 10.3 Mask Option of Feedback Resistor for Subsystem Clock is deleted. p. 449 Ordering media in APPENDIX C ORDERING MASK ROMS are changed. The mark shows major revised points. |
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