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MM2201VDW6TR Datasheet(PDF) 5 Page - STMicroelectronics

Part # MM2201VDW6TR
Description  2-Wires 1 Kbit x8 Serial EEPROM
Download  15 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

MM2201VDW6TR Datasheet(HTML) 5 Page - STMicroelectronics

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background image
Symbol
Alt
Parameter
Min
Max
Unit
tCH1CH2
tR
Clock Rise Time
1
µs
tCL1CL2
tF
Clock Fall Time
300
ns
tDH1DH2
tR
Input Rise Time
1
µs
tDL1DL1
tF
Input Fall Time
300
ns
tCHDX
(1)
tSU:STA
Clock High to Input Transition
4.7
µs
tCHCL
tHIGH
Clock Pulse Width High
4
µs
tDLCL
tHD:STA
Input Low to Clock Low (START)
4
µs
tCLDX
tHD:DAT
Clock Low to Input Transition
0
µs
tCLCH
tLOW
Clock Pulse Width Low
4.7
µs
tDXCX
tSU:DAT
Input Transition to Clock Transition
250
ns
tCHDH
tSU:STO
Clock High to Input High (STOP)
4.7
µs
tDHDL
tBUF
Input High to Input Low (Bus Free)
4.7
µs
tCLQV
(2)
tAA
Clock Low to Next Data Out Valid
0.3
3.5
µs
tCLQX
tDH
Data Out Hold Time
300
ns
fC
fSCL
Clock Frequency
100
kHz
tW
tWR
Write Time
10
ms
Notes: 1. For a reSTART condition, or following a write cycle.
2. The minimum value delays the falling/rising edge of SDA away from SCL = 1 in order to avoid unwanted START and/or STOP
conditions.
Table 5. AC Characteristics
(TA = 0 to 70
°C or –40 to 85 °C; VCC = 4.5V to 5.5V or 2.7V to 5.5V)
Memory Addressing. To start communication be-
tween the bus master and the slave M2201, the
master must initiate a START condition. Following
this, the master sends onto the SDA bus line 8 bits
(MSB first) corresponding to the 7th bit byte-ad-
dress and a READ or WRITE bit. This 8th bit is set
to ’1’ for read and ’0’ for write operations. If a match
is found, the corresponding memory will acknow-
ledge the identification on the SDA bus during the
9th bit time.
Write Operations
Following a START condition the master sends the
byte address with the RW bit reset to ’0’. The
memory acknowledges this and waits for a data
byte. Any write command with WC = 1 (during a
period of time from the START condition until the
end of the Byte Address) will not modify data and
will NOT be acknowledged on data bytes, as in
Figure 8.
Input Rise and Fall Times
≤ 50ns
Input Pulse Voltages
0.2VCC to 0.8VCC
Input and Output Timing Ref.
Voltages
0.3VCC to 0.7VCC
Table 6. AC Measurement Conditions
AI00825
0.8VCC
0.2VCC
0.7VCC
0.3VCC
Figure 4. AC Testing Input Output Waveforms
5/15
M2201


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