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ICS8535AG-31LFT Datasheet(PDF) 8 Page - Integrated Circuit Systems |
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ICS8535AG-31LFT Datasheet(HTML) 8 Page - Integrated Circuit Systems |
8 / 14 page 8535AG-31 www.icst.com/products/hiperclocks.html REV. B APRIL 29, 2005 8 Integrated Circuit Systems, Inc. ICS8535-31 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER APPLICATION INFORMATION V CC - 2V 50 Ω 50 Ω RTT Z o = 50Ω Z o = 50Ω FOUT FIN RTT = Z o 1 ((V OH + VOL) / (VCC – 2)) – 2 3.3V 125 Ω 125 Ω 84 Ω 84 Ω Z o = 50Ω Z o = 50Ω FOUT FIN The clock layout topology shown below is a typical termina- tion for LVPECL outputs. The two different layouts mentioned are recommended only as guidelines. FOUT and nFOUT are low impedance follower outputs that gen- erate ECL/LVPECL compatible outputs. Therefore, terminating resistors (DC current path to ground) or current sources must be used for functionality. These outputs are designed to drive 50 Ω transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 2A and 2B show two different layouts which are recommended only as guidelines. Other suitable clock lay- outs may exist and it would be recommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations. TERMINATION FOR LVPECL OUTPUTS FIGURE 2B. LVPECL OUTPUT TERMINATION FIGURE 2A. LVPECL OUTPUT TERMINATION Figure 3. CRYSTAL INPUt INTERFACE CRYSTAL INPUT INTERFACE The ICS8535-31 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 3 below were determined using an 18pF parallel reso- nant crystal and were chosen to minimize the ppm error. These same capacitor values will tune any 18pF parallel reso- nant crystal over the frequency range and other parameters specified in this data sheet. The optimum C1 and C2 values can be slightly adjusted for different board layouts. C1 18p X1 18pF Parallel Crystal C2 22p XTAL_IN XTAL_OUT |
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