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M27C320-100M1 Datasheet(PDF) 4 Page - STMicroelectronics |
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M27C320-100M1 Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 15 page  M27C320 4/15 Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product features a 2 line con- trol function which accommodates the use of mul- tiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the prima- ry device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselect- ed memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. Table 5. AC Measurement Conditions High Speed Standard Input Rise and Fall Times ≤ 10ns ≤ 20ns Input Pulse Voltages 0 to 3V 0.4V to 2.4V Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V Figure 3. Testing Input Output Waveform AI01822 3V High Speed 0V 1.5V 2.4V Standard 0.4V 2.0V 0.8V Figure 4. AC Testing Load Circuit AI01823B 1.3V OUT CL CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance 3.3k Ω 1N914 DEVICE UNDER TEST Table 6. Capacitance (1) (TA =25 °C, f = 1 MHz) Note: 1. Sampled only, not 100% tested. Symbol Parameter Test Condition Min Max Unit CIN Input Capacitance VIN =0V 10 pF COUT Output Capacitance VOUT =0V 12 pF |
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