W83195BR-341 datasheet(6/26 Pages) WINBOND

Part #	W83195BR-341

Description	WINBOND CLOCK GENERATOR FOR VIA P4/KT SERIES CHIPSET

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Manufacturer	WINBOND [Winbond]

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W83195BR-341/W83195BG-341

CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET

- 2 -

3. PIN CONFIGURATION

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FS0 */R E F0

GND

XIN

XOUT

VDDAGP

AGP 0

S ELP 4 _ K 7 * /A G P 1

AGP 2

GND

FS1 & /P C I_ F

S E L S D_ DD & /P C I1

M U LTS E L* /P C I2

GND

PC I3

PC I4

VDDP C I

PC I5

PC I6

GND

FS3 & /4 8 M h z

FS2 & /24_4 8M H z

VDD4 8

VDD

GND

IR E F

PD # * /R E SE T#

SC LK *

S DAT A*

VT T _ P W R GD# /R E F 1

VDDR

GND

C P UT /C P UOD_ T

C P UC /C P UOD_ C

VDDC

VDDI

CP U CS _ C

CP U CS _ T

GND

F B OUT

BU F _ IN

DDR T 0 /S DRAM 0

DDR C 0 /S DR AM 1

DDR T 1 /S DRAM 2

DDR C 1 /S DR AM 3

VDDD

GND

DDR T 2 /S DRAM 4

DDR C 2 /S DR AM 5

DDR T 3 /S DRAM 6

DDR C 3 /S DR AM 7

VDDD

GND

DDR T 4 /S DRAM 8

DDR C 4 /S DR AM 9

DDR T 5 /S DRAM 1 0

DDR C 5 /S DR AM 1 1

#: Active low

*: Internal pull up resistor 120KΩ to VDD

&: Internal Pull-down resistor 120KΩ to GND

4.

BLOCK DIAGRAM

PLL2

XT AL

OS C

PL L 1

Sp re a d

S p ectru m

M /N /R a tio

RO M

La tc h

&P O R

Co n tro l

Lo g ic

&C o n fig

Re g is te r

I2 C

In te rfa c e

Div id e r

VC OC L K

48M H z

RE F 0 :1

CP UT /C P U OD _ T

C P UC/C P U OD _ C

AG P ( 0 :2 )

PC I _ F

PC I 1 :6

RE S E T #

Rre f

XIN

XO UT

VT T _ P W R GD #

FS (0 :3 )

PD # *

S D AT A*

SC LK *

3

6

2

CP U C S _ T

CP U CS _ C

S E L P 4_K 7*

Divid er

24_ 48M H z

BU F _ IN

FB O U T

D D R T (0 :5 )/

S D R A M ( 0,2,4 ,6,8,1 0 )

D D R C (0 :5 )/

S D R A M (1,3 ,5,7,9,1 1)

6

PC I_ ST O P# *

CL K_ S T O P # *

SE LS D _ D D &

M U L T S EL*

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