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M36DR432C, M36DR432D

Note: 1. Commands not interpreted in this table will default to read array mode.

2. For Coded cycles address inputs A11-A20 are don't care.

3. X = Don't Care.

4. The first cycles of the RD or AS instructions are followed by read operations. Any number of read cycles can occur after the com-

mand cycles.

5. During Erase Suspend, Read and Data Program functions are allowed in blocks not being erased.

6. Program Address 1 and Program Address 2 must be consecutive addresses differing only for address bit A0.

XBY

Exit Bypass

Mode

2

Addr.

XX

Data

90h

00h

PGBY

Program in

Bypass Mode

2

Addr.

X

Program

Address

Read Data Polling or Toggle Bit until Program

completes.

Data

A0h

Program

Data

DPGBY

Double Word

Program in

Bypass Mode

3

Addr.

X

Program

Address 1

Program

Address 2

Note 6, 7

Data

40h

Program

Data 1

Program

Data 2

BP

Block Protect

4

Addr.

555h

2AAh

555h

Block

Address

Data

AAh

55h

60h

01h

BU

Block Unprotect

1

Addr.

555h

2AAh

555h

Block

Address

Data

AAh

55h

60h

D0h

BL

Block Lock

4

Addr.

555h

2AAh

555h

Block

Address

Data

AAh

55h

60h

2Fh

BE

Block Erase

6+

Addr.

555h

2AAh

555h

555h

2AAh

Block

Address

Data

AAh

55h

80h

AAh

55h

30h

BKE

Bank Erase

6

Addr.

555h

2AAh

555h

555h

2AAh

Bank

Address

Data

AAh

55h

80h

AAh

55h

10h

ES

Erase Suspend

1

X

Read until Toggle stops, then read all the data needed

from any Blocks not being erased then Resume Erase.

Data

B0h

ER

Erase Resume

1

Addr.

Bank

Address

Read Data Polling or Toggle Bits until Erase completes or

Erase is suspended another time

Data

30h

Mne.

Instr.

Cyc.

1st Cyc.

2nd Cyc.

3rd Cyc.

4th Cyc.

5th Cyc.

6th Cyc.