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M36W108ABZM Datasheet(PDF) 2 Page - STMicroelectronics |
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M36W108ABZM Datasheet(HTML) 2 Page - STMicroelectronics |
2 / 36 page M36W108AT, M36W108AB 2/36 DESCRIPTION The M36W108A is multi-chip device containing an 8 Mbit boot block Flash memory and a 1 Mbit of SRAM. The device is offered in the new Chip Scale Package solutions: LBGA48 1.0mm ball pitch and LGA48 1.0mm land pitch. The two components, of the package’s overall 9 Mbit of memory, are distinguishable by use of the three chip enable lines: EF for the Flash memory, E1S and E2S for the SRAM. The Flash memory component is identical with the M29W008A device. It is a non-volatile memory that may be erased electrically at the block or chip level and programmed in-system on a Byte-by- Byte basis using only a single 2.7V to 3.6V VCCF supply. For Program and Erase operations the necessary high voltages are generated internally. The device can also be programmed in standard programmers. The array matrix organization al- lows each block to be erased and reprogrammed without affecting other blocks. Instructions for Read/Reset, Auto Select for read- ing the Electronic Signature, Programming, Block Figure 2. LBGA and LGA Connections (Top View) C B A 6 5 4 3 2 1 E D F G A11 A14 A1 NC EF VSS A2 A3 DQ3 NC NC A4 A7 VCCF NC A0 VSS A8 A18 VCCS DQ1 DQ2 DQ4 A5 NC W DQ7 DQ5 A19 NC A6 DQ0 A10 E1S AI02508 G H E2S RB A13 DQ6 NC A9 A15 A12 NC A16 NC RP A17 Table 1. Signal Names A0-A16 Address Inputs A17-A19 Address Inputs for Flash Chip DQ0-DQ7 Data Input/Outputs, Command Inputs for Flash Chip EF Chip Enable for Flash Chip E1S, E2S Chip Enable for SRAM Chip G Output Enable W Write Enable RP Reset for Flash Chip RB Ready/Busy Output for Flash Chip VCCF Supply Voltage for Flash Chip VCCS Supply Voltage for SRAM Chip VSS Ground NC Not Connected Internally |
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