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M74HC11 Datasheet(PDF) 1 Page - STMicroelectronics |
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M74HC11 Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 9 page M54HC11 M74HC11 February 1993 TRIPLE 3-INPUT AND GATE B1R (Plastic Package) ORDER CODES : M54HC11F1R M74HC11M1R M74HC11B1R M74HC11C1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTIONS (top view) NC = No Internal Connection INPUT AND OUTPUT EQUIVALENT CIRCUIT . HIGH SPEED tPD = 7 ns (TYP.) AT VCC =5 V . LOW POWER DISSIPATION ICC =1 µA (MAX.) AT TA =25 °C . HIGH NOISE IMMUNITY VNIH =VNIL =28 % VCC (MIN.) . OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS . SYMMETRICAL OUTPUT IMPEDANCE IOH =IOL = 4 mA (MIN.) . BALANCED PROPAGATION DELAYS tPLH =tPHL . WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V . PIN AND FUNCTION COMPATIBLE WITH 54/74LS11 The M54/74HC11 is a high speed CMOS TRIPLE 3-INPUT AND GATE fabricated in silicon gate C 2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The internal circuit is composed of 4 stages includ- ing buffered output, which gives high noise immunity and a stable output. All inputs are equipped with pro- tection circuits against static discharge and transient excess voltage. DESCRIPTION 1/9 |
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