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ADS5562 Datasheet(PDF) 3 Page - Texas Instruments

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Part # ADS5562
Description  16-BIT, 40/80 MSPS ADCs WITH DDR LVDS/CMOS OUTPUTS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS5562 Datasheet(HTML) 3 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
(1)
RECOMMENDED OPERATING CONDITIONS
ADS5560
ADS5562
www.ti.com ....................................................................................................................................................................................................... SLWS207 – MAY 2008
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
AVDD
Supply voltage range
–0.3 V to 3.9
V
DRVDD
Supply voltage range
–0.3 V to 3.9
V
Voltage between AGND and DRGND
-0.3 to 0.3
V
Voltage between AVDD to DRVDD
-0.3 to 3.3
V
Voltage applied to VCM pin (in external reference mode)
-0.3 to 1.8
V
Voltage applied to analog input pins
–0.3 V to minimum (3.6, AVDD + 0.3 V)
V
TA
Operating free-air temperature range
–40 to 85
°C
Tjmax
Operating junction temperature range
125
°C
TSTG
Storage temperature range
–65 to 150
°C
Lead temperature 1,6 mm (1/16") from the case for 10 seconds
220
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
over operating free-air temperature range (unless otherwise noted)
MIN
TYP
MAX
UNIT
SUPPLIES AND REFERENCES
AVDD
Analog supply voltage
3
3.3
3.6
V
DRVDD Digital supply voltage
3
3.3
3.6
V
ANALOG INPUTS
Differential input voltage range (with default fine gain=1 dB)
3.56
VPP
Input common-mode voltage
1.5 ±0.1
V
Voltage applied on VCM in external reference mode
1.5
V
±0.05
CLOCK INPUT
Sample rate
DEFAULT SPEED mode
> 30
80
MSP
S
ADS5562
LOW SPEED mode (1)
1
30
MSP
S
DEFAULT SPEED mode
> 30
40
MSP
S
ADS5560
LOW SPEED mode
1
30
MSP
S
Sine wave, LVPECL,
Supported clock waveform formats
LVDS, LVCMOS
Clock amplitude, ac-coupled, differential (VCLKP - VCLKM)
0.4
VPP
Clock duty cycle
45%
50%
55%
DIGITAL OUTPUTS
CL
Maximum external load capacitance from each output pin to DRGND (LVDS and CMOS
5
pF
modes)
RL
Differential external load resistance between the LVDS output pairs (LVDS mode)
100
Operating free-air temperature
-40
85
°C
(1)
See Low sampling frequency operation in application section for details.
Copyright © 2008, Texas Instruments Incorporated
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