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SN75LBC175AD Datasheet(PDF) 4 Page - Texas Instruments |
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SN75LBC175AD Datasheet(HTML) 4 Page - Texas Instruments |
4 / 16 page SN65LBC175A, SN75LBC175A QUADRUPLE RS485 DIFFERENTIAL LINE RECEIVERS SLLS455B − NOVEMBER 2000 − REVISED MARCH 2005 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating conditions PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIT+ Positive-going differential input voltage threshold −80 −10 VIT− Negative-going differential input voltage threshold −7 V < VCM < 12 V (VCM = (VA + VB ) / 2 ) −200 −120 mV VHYS Hysteresis voltage (VIT+ − VIT−) −40 mV VIK Input clamp voltage II = −18 mA −1.5 −0.8 V VOH High-level output voltage VID = 200 mV, IOH = −8 mA See Figure 1 2.7 4.8 V VOL Low-level output voltage VID = −200 mV, IOL = 8 mA See Figure 1 0.2 0.4 V IOZ High-impedance-state output current VO = 0 V to VCC −1 1 µA II Line input current Other input at 0 V, V = 0 V or 5 V VI = 12 V 0.9 mA II Line input current Other input at 0 V, VCC = 0 V or 5 V VI = −7 V −0.7 mA IIH High-level input current Enable inputs 100 µA IIL Low-level input current Enable inputs −100 µA RI Input resistance A, B 12 k Ω ICC Supply current VID = 5 V 1,2EN, 3,4EN at 0 V 20 mA ICC Supply current No load 1,2EN, 3,4EN at VCC 11 16 mA † All typical values are at VCC = 5 V and 25°C. switching characteristics over recommended operating conditions PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT tr Output rise time 2 4 ns tf Output fall time VID = −3 V to 3 V, See Figure 2 2 4 ns tPLH Propagation delay time, low-to-high level output VID = −3 V to 3 V, See Figure 2 9 12 16 ns tPHL Propagation delay time, high-to-low level output 9 12 16 ns tPZH Propagation delay time, high-impedance to high-level output See Figure 3 27 38 ns tPHZ Propagation delay time, high-level to high-impedance output See Figure 3 7 16 ns tPZL Propagation delay time, high-impedance to low level output See Figure 4 29 38 ns tPLZ Propagation delay time, low-level to high-impedance output See Figure 4 12 16 ns tsk(p) Pulse skew (| (tPLH – tPHL) |) 0.2 1 ns tsk(o) Output skew (see Note 4) 2 ns tsk(pp) Part-to-part skew (see Note 5) 2 ns † All typical values are at VCC = 5 V and 25°C. NOTES: 4. Outputs skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected together. 5. Part-to-part skew (tsk(pp)) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical packages and test circuits. |
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