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PF38F5070M0R1B0 Datasheet(PDF) 8 Page - Numonyx B.V |
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PF38F5070M0R1B0 Datasheet(HTML) 8 Page - Numonyx B.V |
8 / 139 page Numonyx™ StrataFlash® Cellular Memory (M18) Datasheet April 2008 8 309823-10 1.0 Introduction Numonyx™ StrataFlash® Cellular Memory is the sixth generation Numonyx™ StrataFlash® memory with multi-level cell (MLC) technology. It provides high- performance, low-power synchronous-burst read mode and asynchronous read mode at 1.8 V. It features flexible, multi-partition read-while-program and read-while-erase capability, enabling background programming or erasing in one partition simultaneously with code execution or data reads in another partition. The eight partitions allow flexibility for system designers to choose the size of the code and data segments. The Numonyx™ StrataFlash® Cellular Memory is manufactured using Intel* 65 nm ETOX* X and 90 nm ETOX* IX process technology and is available in industry- standard chip-scale packaging. 1.1 Document Purpose This document describes the specifications of the Numonyx™ StrataFlash® Cellular Memory device. 1.2 Nomenclature 1.3 Acronyms Table 1: Definition of Terms Term Definition 1.8 V Refers to VCC and VCCQ voltage range of 1.7 V to 2.0 V Block A group of bits that erase with one erase command Main Array A group of 256-KB blocks used for storing code or data Partition A group of blocks that share common program and erase circuitry and command status register Programming Region An aligned 1-KB section within the main array Segment A 32-byte section within the programming region Byte 8 bits Word 2 bytes = 16 bits Kb 1024 bits KB 1024 bytes KW 1024 words Mb 1,048,576 bits MB 1,048,576 bytes Table 2: List of Acronyms Acronym Meaning APS Automatic Power Savings CFI Common Flash Interface DU Don’t Use ECR Enhanced Configuration Register (Flash) |
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