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TMS320DM641 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320DM641 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 179 page Revision History 4 June 2003 − Revised October 2005 SPRS222E PAGE(s) NO. ADDS/CHANGES/DELETES 106 External Memory Interface (EMIF), EMIF Electrical Data Timing, Asynchronous Memory Timing section: Timing Requirements for Asynchronous Memory Cycles for EMIFA Module table: Updated Parameter No. 7, th(EKO1H-ARDY) MIN from “2.0” to “2.5” Switching Characteristics Over Recommended Operating Conditions for Asynchronous Memory Cycles for EMIFA Module table: Updated Parameter No. 1, tosu(SELV-AREL) MIN from “RS*E − 1.5” to “RS*E − 1.8” Updated Parameter No. 8, tosu(SELV-AWEL) MIN from “WS*E − 1.7” to “WS*E − 2.0” 109 External Memory Interface (EMIF), EMIF Electrical Data Timing, Programmable Synchronous Interface Timing section: Timing Requirements for Programmable Synchronous Interface Cycles for EMIFA Module table: Updated Parameter No. 7, th(EKOxH-EDV) MIN from “1.5” to “1.8” for −400 and−500 device speeds Switching Characteristics Over Recommended Operating Conditions for Programmable Synchronous Interface Cycles for EMIFA Module table: Updated all delay times MIN for −400, −500 and −600 device speeds from “1.3” to “1.1” 113 External Memory Interface (EMIF), EMIF Electrical Data Timing section, Synchronous DRAM Timing section: Timing Requirements for Asynchronous Memory Cycles for EMIFA Module table: Updated Parameter No. 7, th(EKO1H-ARDY) MIN from “2.5” to “2.8” for −400 and −500 device speeds Updated Parameter No. 7, th(EKO1H-ARDY) MIN from “1.8” to “2.1” for −600 and device speed 127−128 Multichannel Audio Serial Port (McASP) Timing section:: Updated McASP Input and Output Timings figures 140 External Memory Interface (EMIF), McBSP Electrical Data/Timing, Multichannel Buffered Serial Port (McBSP) Timing section: Switching Characteristics Over Recommended Operating Conditions for McBSP table: Updated Parameter No. 12, tdis(CKXH-DXHZ)), CLKX ext MIN from “2.0” to “−2.1” Updated Parameter No. 13, td(CKXH-DXV) CLKX ext MIN from “2.0 + D1” to “−2.1 + D1” 161 Ethernet Media Access (EMAC) Control, EMAC Electrical Data/Timing: Timing Requirements for EMAC MII Receive 10/100 Mbit/s table: Deleted paragraph Switching Characteristics Over Recommended Operating Conditions for EMAC MII Transmit 10/100 Mbit/s table: Deleted paragraph 168 IEEE 1149.1 JTAG Compatibility Statement section: Updated/added paragraphs for clarity |
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