Electronic Components Datasheet Search |
|
SN74LVC1G02DCKTE4 Datasheet(PDF) 1 Page - Texas Instruments |
|
SN74LVC1G02DCKTE4 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 15 page www.ti.com FEATURES See mechanical drawings for dimensions. DBV PACKAGE (TOP VIEW) 5 1 V CC A 2 B 3 4 GND Y DRL PACKAGE (TOP VIEW) 2 B V CC 5 1 A 3 4 GND GND Y DCK PACKAGE (TOP VIEW) 2 B 3 4 GND V CC 5 A Y 1 YZP PACKAGE (BOTTOM VIEW) 2 B V CC 1 5 A GND 4 3 Y DESCRIPTION/ORDERING INFORMATION SN74LVC1G02 SINGLE 2-INPUT POSITIVE NOR-GATE SCES213R – APRIL 1999 – REVISED JANUARY 2007 • Available in the Texas Instruments • I off Supports Partial-Power-Down Mode NanoFree™ Package Operation • Supports 5-V V CC Operation • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • Inputs Accept Voltages to 5.5 V • ESD Protection Exceeds JESD 22 • Max t pd of 3.6 ns at 3.3 V – 2000-V Human-Body Model (A114-A) • Low Power Consumption, 10-µA Max I CC – 200-V Machine Model (A115-A) • ±24-mA Output Drive at 3.3 V – 1000-V Charged-Device Model (C101) This single 2-input positive-NOR gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G02 performs the Boolean function Y = A + B or Y = A •B in positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP SN74LVC1G02YZPR _ _ _ CB_ (Pb-free) Reel of 3000 SN74LVC1G02DBVR SOT (SOT-23) – DBV C02_ –40 °C to 85°C Reel of 250 SN74LVC1G02DBVT Reel of 3000 SN74LVC1G02DCKR SOT (SC-70) – DCK CB_ Reel of 250 SN74LVC1G02DCKT SOT (SOT-553) – DRL Reel of 4000 SN74LVC1G02DRLR CB_ (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site. YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1999–2007, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
Similar Part No. - SN74LVC1G02DCKTE4 |
|
Similar Description - SN74LVC1G02DCKTE4 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |