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ADN4668 Datasheet(PDF) 5 Page - Analog Devices |
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ADN4668 Datasheet(HTML) 5 Page - Analog Devices |
5 / 12 page ADN4668 Rev. 0 | Page 5 of 12 80% 80% 20% 1.5V 20% 1.5V tPLHD tPHLD RINx– RINx+ 0V (DIFFERENTIAL) tTLH tTHL VOH VOL 1.2V 1.3V 1.1V ROUTx VID = 200mV Figure 3. Receiver Propagation Delay and Transition Time Waveforms ROUTx RINx+ 50Ω CL EN EN SIGNAL GENERATOR RINx– VCC GND S1 NOTES 1. CL INCLUDES LOAD AND TEST JIG CAPACITANCE. 2. S1 CONNECTED TO VCC FOR tPZL AND tPLZ MEASUREMENTS. 3. S1 CONNECTED TO GND FOR tPZH AND tPHZ MEASUREMENTS. RL Figure 4. Test Circuit for Receiver Enable/Disable Delay 3V 0V 3V 0V tPLZ tPHZ tPZH tPZL VOH GND VOL VCC EN WITH EN = GND OR OPEN CIRCUIT EN WITH EN = VCC 50% 50% ROUTx WITH VID = –100mV ROUTx WITH VID = +100mV 0.5V 1.5V 1.5V 0.5V 1.5V 1.5V Figure 5. Receiver Enable/Disable Delay Waveforms |
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