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MPC860ENCZQ66D4 Datasheet(PDF) 40 Page - Freescale Semiconductor, Inc |
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MPC860ENCZQ66D4 Datasheet(HTML) 40 Page - Freescale Semiconductor, Inc |
40 / 80 page MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8 40 Freescale Semiconductor Bus Signal Timing Figure 32 shows the reset timing for the data bus configuration. Figure 32. Reset Timing—Configuration from Data Bus Figure 33 provides the reset timing for the data bus weak drive during configuration. Figure 33. Reset Timing—Data Bus Weak Drive During Configuration HRESET RSTCONF D[0:31] (IN) R71 R74 R73 R75 R76 CLKOUT HRESET D[0:31] (OUT) (Weak) RSTCONF R69 R79 R77 R78 |
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