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ADS5517IRGZTG4 Datasheet(PDF) 4 Page - Texas Instruments

Part # ADS5517IRGZTG4
Description  11-BIT, 200 MSPS ADC
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS5517IRGZTG4 Datasheet(HTML) 4 Page - Texas Instruments

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ELECTRICAL CHARACTERISTICS
ADS5517
SLWS203 – DECEMBER 2007
Typical values are at 25
°C, min and max values are across the full temperature range T
MIN = –40°C to TMAX = 85°C,
AVDD = DRVDD = 3.3 V, sampling rate = 200 MSPS, sine wave input clock, 1.5 VPP differential clock amplitude, 50% clock
duty cycle, –1 dBFS differential analog input, internal reference mode, 0-db gain, DDR LVDS data output (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
11
bits
ANALOG INPUT
Differential input voltage range
2
VPP
Differential input capacitance
7
pF
Analog input bandwidth
800
MHz
Analog input common mode current
342
µA
(per input pin)
REFERENCE VOLTAGES
V(REFB)
Internal reference bottom voltage
Internal reference mode
0.5
V
V(REFT)
Internal reference top voltage
Internal reference mode
2.5
V
ΔV(REF)
Internal reference error
V(REFT) - V(REFB)
-60
±25
60
mV
VCM
Common mode output voltage
Internal reference mode
1.5
V
VCM output current capability
Internal reference mode
±4
mA
DC ACCURACY
No Missing Codes
Specified
DNL
Differential non-linearity
-0.6
±0.3
1.0
LSB
INL
Integral non-linearity
-1.5
±0.6
1.5
LSB
Offset error
-10
5
10
mV
Offset temperature coefficient
0.002
ppm/
°C
Gain error due to internal reference
(
ΔV(REF) / 2.0V)%
-3
±1
3
%FS
error alone
Gain error excluding internal reference
-2
± 1
2
%FS
error(1)
Gain temperature coefficient
0.01
Δ%/
°C
PSRR
DC Power supply rejection ratio
0.6
mV/V
POWER SUPPLY
I(AVDD)
Analog supply current
306
mA
LVDS mode, IO = 3.5 mA,
66
mA
RL = 100 Ω, CL = 5 pF
I(DRVDD)
Digital supply current
CMOS mode, FIN = 2.5 MHz,
47
mA
CL = 5 pF
ICC
Total supply current
LVDS mode
372
mA
Total power dissipation
LVDS mode
1.23
1.4
W
Standby power
In STANDBY mode with clock stopped
100
150
mW
Clock stop power
With input clock stopped
100
150
mW
(1)
Gain error is specified from design and characterization; it is not tested in production.
4
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Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): ADS5517


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