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TSB12C01A Datasheet(PDF) 8 Page - Texas Instruments |
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TSB12C01A Datasheet(HTML) 8 Page - Texas Instruments |
8 / 38 page TSB21LV03 IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER SLLS230A – MARCH 1996 – REVISED DECEMBER 1996 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VDD – 0.3 V to 4 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI – 0.5 V to VDD+0.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range at any output, VO – 0.5 V to VDD+0.5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous total power dissipation See Dissipation Rating Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature, TA 0 _C to 70_C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65 _C to 150_C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 300 _C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA ≤ 25_C POWER RATING DERATING FACTOR‡ ABOVE TA = 25_C TA = 70_C POWER RATING PM 1350 mW 10.8 mW/ _C 865 mW ‡ This is the inverse of the traditional junction-to-case thermal resistance (RθJA) and uses a board-mounted 92.5_C/W. recommended operating conditions MIN NOM MAX UNIT Supply voltage VDD Source power node 3.0 3.3 3.6 V Supply voltage, VDD Nonsource power node§ 2.7 3 3.6 V High-level input voltage, VIH CMOS inputs 0.7 VDD V Low-level input voltage, VIL CMOS inputs 0.2 VDD V Cable inputs, 100-Mbit operation 142 260 Differential input voltage, VID Cable inputs, 200-Mbit operation 132 260 mV Cable inputs, during arbitration 171 262 TPB cable inputs, 100-Mbit or speed signaling off, Source power node 1.165 2.515 Common mode input voltage VIC TPB cable inputs, 100-Mbit or speed signaling off, Nonsource power node§ 1.165 2.015 V Common-mode input voltage, VIC TPB cable inputs, 200-Mbit speed signaling, Source power node 0.935 2.515 V TPB cable inputs, 200-Mbit speed signaling, Nonsource power node§ 0.935 2.015 Receive input jitter TPA, TPB cable inputs, 100-Mbit operation ±1.08 ns Receive input jitter TPA, TPB cable inputs, 200-Mbit operation ±0.5 ns Receive input slew Between TPA and TPB cable inputs, 100-Mbit operation ±0.8 ns Receive input slew Between TPA and TPB cable inputs, 200-Mbit operation ±0.55 ns Output current IOL/IOH SYSCLK –16 16 mA Output current, IOL/IOH Control, Data, CNA and C/LKON outputs –12 12 mA Output current, IO TPBIAS outputs –3 1.3 mA Hold time, power-up reset (RESET) 2 ms § For a node that does not source power (see Section 4.2.2.2 in IEEE 1394–1995 Standard). |
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