PE3501_08 datasheet(2/9 Pages) PEREGRINE

Part #	PE3501

Description	3500 MHz Low Power UltraCMOS??Divide-by-2 Prescaler

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Manufacturer	PEREGRINE [Peregrine Semiconductor Corp.]

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Product Specification

PE3501

Page 2 of 8

Document No. 70-0111-04

│ UltraCMOS™ RFIC Solutions

Table 2. Pin Descriptions

Table 3. Absolute Maximum Ratings

Electrostatic Discharge (ESD) Precautions

When handling this UltraCMOS™ device, observe

the same precautions that you would use with

other ESD-sensitive devices. Although this device

contains circuitry to protect it from damage due to

ESD, precautions should be taken to avoid

exceeding the rating specified in Table 3.

Latch-Up Avoidance

Unlike conventional CMOS devices, UltraCMOS™

devices are immune to latch-up.

Figure 3. Pin Configuration (Top View)

Device Functional Considerations

The PE3501 divides a 400 MHz to 3500 MHz

input signal by two, producing a 200 MHz to 1750

MHz output signal. To work properly, pin 3 must

be supplied with a bypass capacitor to ground. In

addition, the input and output signals (pins 2 & 7)

must be AC coupled via an external capacitor, as

shown in the test circuit in Figure 4.

The ground pattern on the board should be made

as wide as possible to minimize ground

impedance. See Figure 11 for a layout example.

Exceeding absolute maximum ratings may cause

permanent damage. Operation should be

restricted to the limits in the Operating Ranges

table. Operation between operating range

maximum and absolute maximum for extended

periods may reduce reliability.

3501

1

2

3

4

8

7

6

5

FIN

GND

DEC

GND

FOUT

VDD

NC

GND

No.

Name

Description

1

VDD

Power supply pin. Bypassing is required.

2

Fin

Input signal pin. DC blocking capacitor

required (15 pF typical)

3

DEC

Power supply decoupling pin. Place a ca-

pacitor as close as possible and connect

directly to the ground plane.

4

GND

Ground pin. Ground pattern on the board

should be as wide as possible to reduce

ground impedance.

5

GND

Ground pin.

6

NC

No Connection. This pin should be left

open.

7

Fout

Divided frequency output pin. DC blocking

capacitor required (47 pF typical)

8

GND

Ground pin.

Symbol

Parameter/Conditions

Min

Max

Units

VDD

Supply voltage

4.0

V

Input Power

15

dBm

TST

Storage temperature range

-65

150

°C

TOP

Operating temperature

range

-40

85

°C

VESD

ESD voltage (Human Body

Model)

250

V

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