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SN65LVCP40 Datasheet(PDF) 3 Page - Texas Instruments |
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SN65LVCP40 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 23 page www.ti.com RECOMMENDED OPERATING CONDITIONS V CC * |V ID | 2 ELECTRICAL CHARACTERISTICS SN65LVCP40 SLLS623D – SEPTEMBER 2004 – REVISED FEBRUARY 2006 MIN NOM MAX UNIT dR Operating data rate 4 Gbps VCC Supply voltage 3.135 3.3 3.465 V VCC(N) Supply voltage noise amplitude 10 Hz to 2 GHz 20 mV TJ Junction temperature 125 °C TA Operating free-air temperature(1) -40 85 °C DIFFERENTIAL INPUTS dR(in) ≤ 1.25 Gbps 100 1750 mVpp Receiver peak-to-peak differential input VID 1.25 Gbps < dR(in) ≤ 3.125 Gbps 100 1560 mVpp voltage(2) dR(in) > 3.125 Gbps 100 1000 mVpp Receiver common-mode Note: for best jitter performance ac VICM 1.5 1.6 V input voltage coupling is recommended. CONTROL INPUTS VIH High-level input voltage 2 VCC + 0.3 V VIL Low-level input voltage –0.3 0.8 V DIFFERENTIAL OUTPUTS RL Differential load resistance 80 100 120 Ω (1) Maximum free-air temperature operation is allowed as long as the device maximum junction temperature is not exceeded. (2) Differential input voltage VID is defined as | IN+ – IN– |. over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT DIFFERENTIAL INPUTS Positive going differential VIT+ 50 mV input high threshold Negative going differential VIT– –50 mV input low threshold A(EQ) Equalizer gain From 375 MHz to 1.875 GHz 5 dB Termination resistance, RT(D) 80 100 120 Ω differential Open-circuit Input voltage VBB AC-coupled inputs 1.6 V (input self-bias voltage) Biasing network dc R(BBDC) 30 k Ω impedance 375 MHz 42 Biasing network ac R(BBAC) Ω impedance 1.875 GHz 8.4 DIFFERENTIAL OUTPUTS VOH High-level output voltage RL = 100 Ω±1%, 650 mVpp PRES_1 = PRES_0=0; VOL Low-level output voltage –650 mVpp PREL_1 = PREL_0=0; 4 Gbps alternating Output differential voltage 1010-pattern; VODB(PP) 1000 1300 1500 mVpp without preemphasis(2) Figure 1 VOCM Output common mode voltage 1.65 V Change in steady-state See Figure 6 ∆V OC(SS) common-mode output voltage 1 mV between logic states (1) All typical values are at TA = 25°C and VCC = 3.3 V supply unless otherwise noted. They are for reference purposes and are not production tested. (2) Differential output voltage V(ODB) is defined as | OUT+ – OUT– |. 3 Submit Documentation Feedback |
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