Document No. 008-0316-0

Page 4 - 5

Rev. A

Model 658

7x5mm Low Cost

LVCMOS, LVPECL or LVDS Clock

MECHANICAL SPECIFICATIONS

PACKAGE DRAWING

MARKING INFORMATION

1

(1.27)

0.050

PIN 1 IDENTIFIER

6

4

3

Inch

(mm)

Key:

(3.73)

0.147

(1.4)

0.197 ±0.008

(5.0 ±0.2)

0.079

0.276 ±0.008

0.055

0.200

(5.08)

(7.0 ±0.2)

MAX

(2.0)

2

5

(2.54)

0.100

SUGGESTED SOLDER PAD GEOMETRY

SUGGESTED REFLOW PROFILE

.165 [4.20]

.071 [1.80]

Key:

[mm]

Inch

13

4

6

2

5

.200 [5.08]

.100 [2.54]

.079 [2.00]

1. ** - Manufacturing Site Code.

2. YYWW – Date code, YY – year, WW – week.

3. Truncated CTS part number.

4. XXXMXXXX - Frequency marked with 4

significant digits after the ‘M’.

NOTES

1. Termination pads (e4), barrier-plating is nickel

(Ni) with gold (Au) flash plate.

2. Reflow conditions per JEDEC J-STD-020.

0

100

200

300

0

30

60

90

120

150

180

210

240

270

300

Time (Seconds)

Temp.

(°C)

Maximum 260°C, 10 seconds

Typical 245°C

130°C

CTS ** YYWW

658P3C3

● XXXMXXXX