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ADS62C15 Datasheet(PDF) 6 Page - Texas Instruments |
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ADS62C15 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 62 page  ADS62C15 SLAS577B – JANUARY 2008 – REVISED MAY 2008 ........................................................................................................................................................ www.ti.com ELECTRICAL CHARACTERISTICS (continued) Typical values at 25 °C, min and max values are across the full temperature range T MIN = –40°C to TMAX = 85°C, AVDD = 3.3 V, DRVDD = 1.8 V to 3.3 V, sampling frequency = 125 MSPS, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, SNRBoost disabled, applies to CMOS and LVDS interfaces (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Fin= 10 MHz 67.2 Fin = 50 MHz 65.5 67.1 0 dB gain 66.8 SNR Signal to noise ratio Fin= 170 MHz dBFS 3.5 dB gain 66.4 0 dB gain 66.6 Fin = 230 MHz 3.5 dB gain 66.2 Fin= 10 MHz 67.1 Fin = 50 MHz 65 66.9 0 dB gain 66.5 SINAD Signal to noise and distortion ratio Fin= 170 MHz dBFS 3.5 dB gain 66.2 0 dB gain 66.3 Fin = 230 MHz 3.5 dB gain 65.9 ENOB Effective number of bits Fin = 50 MHz 10.5 10.8 LSB Fin= 10 MHz 89 Fin = 50 MHz 75 79 0 dB gain 82 SFDR Spurious free dynamic range Fin= 170 MHz dBc 3.5 dB gain 84 0 dB gain 78 Fin = 230 MHz 3.5 dB gain 80 Fin= 10 MHz 87 Fin = 50 MHz 72 77 0 dB gain 79 THD Total harmonic distortion Fin= 170 MHz dBc 3.5 dB gain 81 0 dB gain 75 Fin = 230 MHz 3.5 dB gain 77 Fin= 10 MHz 95 Fin = 50 MHz 75 93 0 dB gain 85 HD2 Second harmonic distortion Fin= 170 MHz dBc 3.5 dB gain 87 0 dB gain 82 Fin = 230 MHz 3.5 dB gain 84 Fin= 10 MHz 89 Fin = 50 MHz 75 79 0 dB gain 82 HD3 Third harmonic distortion Fin= 170 MHz dBc 3.5 dB gain 84 0 dB gain 78 Fin = 230 MHz 3.5 dB gain 80 Fin= 10 MHz 94 Fin = 50 MHz 92 Worst Other than second, third harmonics dBc Spur Fin= 170 MHz 90 Fin = 230 MHz 88 F1 = 185 MHz, F2 = 190 MHz IMD 2-Tone intermodulation distortion 88 dBFS each tone at –7 dBFS Recovery to within 1% (of final value) for 6-dB 1 clock Input overload recovery overload with sine wave input cycles 6 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ADS62C15 |
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