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PI2EQX3431 Datasheet(PDF) 1 Page - Pericom Semiconductor Corporation |
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PI2EQX3431 Datasheet(HTML) 1 Page - Pericom Semiconductor Corporation |
1 / 5 page 1 PS8950A 04/30/08 Features • Two 3.2Gbps differential signal pairs • Adjustable Receiver Equalization • 100-Ohm Differential CML I/O’s • Independent Output Level Control • Input signal level detect and squelch for each channel • OOB Support • Low Power (100mW per Channel) • Stand-by Mode – Power Down State • VCC Operating Range: 1.8V ±0.1V • Packaging: — 20-TQFN (3.5x 4.5mm) Description Pericom Semiconductor’s PI2EQX3431 is a low power, signal Re-Driver. The device provides programmable equalization, to optimize performance over a variety of physical mediums by reducing Inter-Symbol Interference. PI2EQX3431 supports two 100-Ohm Differential CML data I/O’s between the Protocol ASIC to a switch fabric, across a backplane, or to extend the signals across other distant data pathways on the user’s platform. The integrated equalization circuitry provides flexibility with signal integrity of the signal before the re-driver. A low-level input signal detection and output squelch function is provided for each channel. Each channel operates fully independantly. When the channels are enabled (CE=1) and operating, that channels input signal level (on xIN+/-) determines whether the output is active. If the input signal level of the channel falls below the active threshold level (Vth-) then the outputs are driven to the common mode voltage. In addition to signal conditioning, when CE = 0, the device enters a low power standby mode. Block Diagram PI2EQX3431 3.2Gbps, 1-port, SATA2/SAS Re-Driver Pin Description (Top Side View) 2 3 4 5 6 7 8 9 19 18 17 16 15 14 13 12 10 11 120 F_SD VDD F_IN+ F_IN- VDD R_OUT+ R_OUT- R_SD CE VDD F_OUT+ F_OUT- VDD R_IN+ R_IN- NC GND x_IN+ CML CML Limiting Amp Equalizer Signal Detection x_EQ Power Management CE x_SD S_ES - Repeated 2 times - x_IN – x_OUT+ x_OUT– 08-0094 |
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