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AD7626 Datasheet(PDF) 4 Page - Analog Devices |
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AD7626 Datasheet(HTML) 4 Page - Analog Devices |
4 / 11 page AD7626 Preliminary Technical Data Rev. PrC | Page 4 of 11 Parameter Conditions Min Typ Max Unit LVDS I/O, (ANSI-644) Data Format Serial LVDS Two’s complement VOD Differential Output Voltage, RL=100 Ω 247 350 454 mV VOCM Common mode Output Voltage, RL=100Ω 1125 1250 1375 mV VID Differential Input Voltage 100 650 mV VICM Common mode Input Voltage 800 1575 mV POWER SUPPLIES Specified Performance VDD1 4.75V 5 5.25V V VDD2 2.37 2.5 2.63 V VIO 2.3 2.5 2.7 V Operating Currents VDD1 10 mA VDD2 25 mA VIO Self-clocked mode 14 mA VIO Echoed-clock mode 18 mA Power Dissipation1 With Internal Reference 10 MSPS throughput 140 mW Without Internal Reference 10 MSPS throughput 120 mW Energy per conversion 10 MSPS throughput 10 nJ/sample TEMPERATURE RANGE Specified Performance TMIN to TMAX −40 +85 °C 1 Power dissipation is for the AD7626 only. In self-clocked interface, 9mW is dissipated in the 100 ohm terminator. In echoed-clock interface, 18mW is dissipated in (2) 100 ohm terminators. TIMING SPECIFICATIONS VDD1 = 5 V; VDD2 = 2.5 V; VIO = 2.3V to 2.7 V; VREF = 4.096 V; all specifications TMIN to TMAX, unless otherwise noted. Table 3. Parameter Symbol Min Typ Max Unit Time between conversion tCYC 100 ns Acquisition time tACQ 40 10000 ns CNV high time tCNVH 10 40 ns CNV to D (MSB) delay tMSB 100 ns CNV to last CLK (LSB) delay tCLKL 64 ns CLK period tCLK TBD 4 ns CLK frequency fCLK 250 400 MHz CLK to DCO delay (echoed-clock mode) tDCO 0 4 7 ns DCO to D delay (echo-clock mode) tD -1 0 1 ns CLK to D delay tCLKD 0 4 7 ns |
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